內(nèi)容

Novas產(chǎn)品線概覽

Verdi自動化偵錯環(huán)境及其應(yīng)用

Siloti可視性增強方案及其應(yīng)用

Certitude?功能驗證品管系統(tǒng)

ProtoLink Probe Visualizer創(chuàng)新的原型板驗證解決方案

Verdi3第三代自動化偵錯環(huán)境

目標(biāo)

2 了解Verdi，Siloti，Certitude，Probe Visualizer的主要功能

2 了解Novas產(chǎn)品線工具在驗證流程中的應(yīng)用

聽眾

數(shù)字IC設(shè)計與驗證工程師

預(yù)備知識

2 基本HDL/HVL設(shè)計能力，了解主流設(shè)計語言?Verilog, VHDL, SystemVerilog, e, Vera, PSL, SVA

2 熟悉主流仿真器

內(nèi)容

· ?Before Debugging

· ?Manage Setup Files

· ?Import Design from Multiple Libraries

· ?Source Code Applications

· ?Design Virtual Top

· ?Debug Functions

· ?Debug Complex Signals

· ?Debug Macro

· ?Watch Signal Operations

· ?Schematic Applications

· ?Edit Schematics

· ?Propagate Constant Values

· ?Preview Lower Scopes

· ?Waveform Applications

· ?Perform Waveform Comparison

· ?Create Events

· ?Temporal Flow View Applications

· ?Trace Unknown Values

· ?Automatic Trace

· ?Debug Memory

· ?FSDB Applications

· ?Improve FSDB Dumping Performance

· ?Parallel FSDB dumping

· ?Handling Big FSDB

練習(xí)

nTrace

Invoke nTrace

Traverse Design Hierarchy

Find module and signals in nTrace

Trace Drivers and loads of signals

nSchema

Invoke nSchema?（RTL Design）

Partial Schematics?（RTL Design）

Partial Schematics (Gate Design)

nState

Invoke nState

State Animation

Analysis Reports

nWave

Invoke nWave

Load，Display and Organize Signals

Creating New Signals

Searching and Markers

Create Events

Preferences

Temporal Flow View (TFV)

Invoke TFV

Basic operations in TFV

Trace This Value

預(yù)備知識

2 具有Verdi標(biāo)準(zhǔn)培訓(xùn)基礎(chǔ)

內(nèi)容

· ?Load Design into Siloti

· ?Perform Behavior Analysis

· ?Essential Signal Analysis

· ?Data Expansion